1. Field of the Invention
The present invention relates to a Schottky-barrier type field effect transistor (MESFET) and, more particularly, to a dual-gate type field effect transistor (FET) having two gate electrodes between a source and drain electrodes.
2. Related Background Art
With the recent rapid development in information network systems, the demands for satellite communication systems have been rapidly increasing, and the frequency band is getting higher and higher. A high-frequency FET, especially a MESFET consisting of GaAs, has been put into practical use as a transistor which can overcome the characteristic limit of a silicon bipolar transistor conventionally used in a high-frequency circuit.
In order to realize a high-output, high-efficiency GaAs MESFET, it is important to decrease the resistance between the source and gate electrodes, i.e., the source resistance (Rs), and increase the transconductance (gm) while increasing the drain breakdown voltage between the gate and drain electrodes.
In a dual-gate type MESFET, in order to increase the drain breakdown voltage, the drain-side gate electrode, i.e., the second gate electrode, may be formed apart from a high-impurity-concentration ion implantation region on the drain electrode side.
In this case, a gate elongation effect is caused to increase the effective gate length in a range where the gate bias is low, i.e., a range where the gate bias is a negative value close to 0 V if the FET is n-channel FET. As a result, the transconductance gm of the FET is decreased in the range.